International conference on
S
emiconductor
M
aterials packaging,
A
I&ML,
R
econfigurable VLSI Architectures based IoT & Future Communication
T
echnologies
Toggle navigation
Home
About Us
SMART 2024
College
Department
Founder Chairman
Chairman
Vice-Chairman
Secretary
Director
Principal
Head of the Department
Keynote Speakers
Committee
Technical Tracks
Author Guidelines
Registrations
Venue
Contact Us
Technical Tracks
VLSI & IoT
Ultra-Low Power VLSI Design for IoT Devices
Integration of IoT Sensors and Actuators in VLSI Systems
Energy-Efficient Circuit Design for IoT Applications
IoT Edge Computing Architectures and VLSI Implementations
Security and Privacy Considerations in VLSI-based IoT Systems
Custom ASIC Designs for IoT Sensor Nodes
VLSI-based Energy Harvesting Techniques for IoT Devices
Embedded Machine Learning and AI for IoT on VLSI Chips.
Communication
5G and 6G Standardization and Roadmaps
Massive MIMO and Beamforming in 5G and 6G Systems
Ultra-Reliable Low Latency Communications (URLLC) in 5G and 6G
Artificial Intelligence and Machine Learning in 5G and 6G Systems
Edge Computing and Mobile Edge Computing (MEC) in 5G and 6G Networks
Wireless Network Resilience and Reliability for 5G and 6G
Satellite Integration and Space-based Communications for 6G
6G Use Cases and Beyond Future Applications and Services.
Devices & circuits
Compact device modeling for energy efficiency
Quantum electronics, Ballistic transport mechanism
Emerging devices & and characteristics (FINFETS, TFET)
Beyond CMOS –III-IV HEMT Ga2o3, HEMT UWB Semiconductor SET
2D, 3D Materials graphite, spintronics, CNT-FETS, Nanotubes
Flexible electronics & and wearable devices
Energy storage, High-efficiency solar cells
Analog, digital, mixed-signal VLSI circuits
System on chip, Bio electronics
Reconfigurable circuits & and optimizing techniques
HDL-based FPGA design, testing, and verification
Semiconductor Packaging
Advanced VLSI Packaging Technologies
3D Integrated Circuit Packaging
System-in-Package (SiP) Design and Integration
Fan-Out Wafer Level Packaging (FOWLP)
Flip-Chip and Chip-on-Board Packaging
Interconnects and Micro-bumps for VLSI Packaging
Wafer-Level Chip Scale Packaging (WLCSP)
Thermal Management in VLSI Packaging
Electrical and Mechanical Reliability of VLSI Packages
Wire Bonding and Die Attach Techniques
VLSI Packaging Materials and Substrates
AI &ML
Multi-Chip Module (MCM) Packaging AIML & VLSI
AI/ML Hardware Accelerators for VLSI Systems
Neuromorphic Computing Architectures and VLSI Implementation
Edge Computing and VLSI Integration for AI Applications
Hardware-aware Machine Learning Algorithms for VLSI Design
VLSI-based Deep Learning Accelerators
Energy-efficient AI/ML Hardware Design for IoT Devices
Reconfigurable Hardware Platforms for Data Science and ML
Hardware Security for AI/ML Models in VLSI Systems
Nano Materials
Biomaterials & Biosensing
Materials for energy storage conversion
Computational material science and modelling
Surface engineering thin film & and coating
Emerging materials and latest technologies
Materials bonding Electronics & Photonics
Materials for green energy storage
Materials for sustainable development
Material recycling & waste management